In general, extremely large quantities of microphones (approximately 1.3-1.5 billion pieces/year) are needed in the area of consumer electronics, such as cell phones, hi-fi devices, or the like, and increasingly in the automotive industry as well, e.g. for voice input. In addition to the hitherto favored design approaches on an electret basis or in the form of precision designs including piezoelectric, capacitive, or inductive signal conversion, solid-state, silicon-based microphones are increasingly entering the market.
The hitherto available manufacturing processes for such solid-state microphones are, however, quite costly. The general design of a solid-state microphone provides for a perforation from the back surface of the wafer under a self-supporting diaphragm of the front side of the wafer, this perforation for one thing making available gas damping mechanisms. Secondly, the perforation, e.g. in the case of face-down assembly on a board or a hybrid by flip-chip connection techniques, also allows sound to pass through in the case of acoustic irradiation from the back surface of the wafer.
In addition, the openings provide pressure compensation, in order to prevent predeflection of the diaphragm when there are changes in the ambient atmospheric pressure. If the diagram is deflected by sound, then under the diaphragm, the gas at approximately atmospheric pressure, present there between the lower side of the diaphragm and the upper side of the counterplate, is compressed, which results in a stream of gas through the pores of the counterplate. This gas stream removes energy from the vibratory system and, with appropriate dimensioning, ensures gas damping of the diaphragm movement and a uniform shape of the spectral characteristic of the microphone. Independently of the function as sound transducer, such a component also always represents a relative pressure sensor, that is, pressure differences between diaphragm front side and diaphragm back surface lead to a corresponding diaphragm deflection, in which, in the case of a pressure sensor, the gas fluidics in the gap under the diaphragm plays only a subordinate part, as a rule. Therefore, a microphone of the described construction type is a relative-pressure sensor expanded by functional gas fluidics and additional volumes and compensating openings, which ultimately make the pressure-sensor component into a sound transducer.
In a capacitive microphone, the counterplate under the diaphragm or the bulk wafer is used as an electric counterelectrode to the diaphragm, i.e. changes in the capacitance across the air-gap capacitor made up of the diaphragm and the counterelectrode are detected in a suitable manner and converted into an electrical signal, which represents the diaphragm deflection and, therefore, the detected sound level.
The micromechanical component of the present invention having the features described herein and the manufacturing method described herein have the advantage, that they propose a simple and reliable process for manufacturing micromechanical components, in particular capacitive silicon microphones, which may be implemented in a particularly cost-effective manner.
Independent of the specific design of such a component with regard to the dimensioning of the diaphragm, the thickness of the counterplate, the diameter and the number of perforation openings, or the electrical signal conversion principle specifically used, some basic method steps are necessary:                perforating the back surface of the wafer for gas exchange under the diaphragm or for back surface acoustic irradiation of the diaphragm, or as pressure-compensation openings, i.e. introducing openings on the back surface of the wafer with the aid of etching, mainly anisotropic etching;        positioning and electrically contacting a suitable evaluating arrangement on the diaphragm, or the diaphragm itself in the case of capacitive detection;        installing and electrically contacting a counterelectrode in the case of capacitive detection;        producing a self-supporting diaphragm on the front side of the wafer, i.e. applying the diaphragm and using suitable sacrificial-layer technology, which may be isotopic sacrificial-layer technology, for exposing or undercutting the diaphragm; and        if applicable, dicing up by way of sawing and packaging.        
According to the exemplary embodiments and/or exemplary methods of the present invention, process steps difficult to control are avoided to the greatest possible extent, as well as exotic process steps, such as pasting wafers onto substrate wafers, or the like. The core part of the process is the trench etching of the back surface of the wafer in conjunction with subsequent sacrificial-layer etching under the future diaphragm, the sacrificial-layer etching having an extremely high selectivity with respect to the silicon base material and silicon-based dielectric layers. Without further measures to protect the surrounding silicon, this very high selectivity allows the sacrificial-layer etching technique to be implemented without attacking the existing silicon structures or functional dielectric layers, which markedly simplifies the entire process again.
The process sequence of the exemplary embodiments and/or exemplary methods of the present invention is IC-process-compatible without limitation, which means that an electrical evaluation circuit for signal conversion and signal processing may also be integrated on the front side of the wafer, where it appears useful for the intended application.
This is so, because all of the micropatterning processes used, with the exception of HF-vapor etching, are in general completely compatible with integrated circuits likewise present on the wafer. Since the optional HF-vapor etching takes place from the back surface of the wafer, it does not reach the sensitive patterns of the front side of the wafer, when the process technology provides for a wafer back surface/wafer front side media separation, e.g. using, during the HF-vapor etching, a suitable wafer fixture having O-ring seals from the front side of the wafer and/or the back surface of the wafer. Technical design approaches which can ensure these media separations are well-known, i.e. familiar to one skilled in the art of HF-vapor etching technology and skilled with the corresponding etching apparatuses.
Advantageous embodiments of the specific subject matter of the present invention, as well as improvements thereto, are set forth in the dependent claims.
The diaphragm is provided to be either convex or flat over the front side of the substrate. Under certain circumstances, the corresponding angle formed by the diaphragm can generate a change in the state of stress of the diaphragm, whereby in certain applications, for instance, diaphragm's predeflection can become too great.
A convexity or diaphragm predeflection occurs if the sacrificial layer is mounted onto an unpatterned substrate and is then patterned. A convexity in the diaphragm or a diaphragm predeflection can be avoided by providing a region into which the sacrificial layer can be sunk, so that in the further process no further stage is developed in the diaphragm layer lying above it, and this is done, for instance, by using anisotropic etching technology in the substrate, or in an electrode layer provided on a substrate, which is used as lower electrode. This removes the problem of the corresponding angle in the attachment of the diaphragm; and the subsequent deposition of the diaphragm layers takes place in a plane, without topography development. For the implementation it should be avoided that the recess in the lower electrode expresses itself in a distinct topography over the entire wafer after the deposition of the sacrificial layer which may be made of Si1−xGex. In that case, a planarization using a CMP step after the sacrificial layer deposition would be indispensable. One is able to avoid this by a selective growing process of silison-germanium or germanium on silicon, but not on SiO2, on which no growth of these germanium-containing materials should take place. A selective deposition of the sacrificial layer has the advantage that only the provided recess in the substrate and in the counterelectrode is coated and the surrounding, dielectrically covered areas do not experience any layer growth. For this purpose, the polysilicon areas outside the recess are covered with a dielectric layer, for instance, an oxide layer. Advantageously, in the process flow for manufacturing a microphone or pressure sensor, an oxide layer for electrical insulation is provided anyhow. The region not covered with oxide that is immerged in the polysilicon counterelectrode or in the substrate is covered with silicon-germanium or with pure germanium, for better epitaxial growth conditions (with silicon as the starting medium). In response to suitable process control (deposition temperature, pressure) the selectivity of this selective growth process can even be promoted. The disadvantage of the corresponding angle in the diaphragm attachment as well as cost-intensive aftertreatment steps, such as CMP (chemical mechanical polishing) in the countersinking of the sacrificial layer without selective growth are therewith overcome, according to this aspect.
According to one exemplary refinement, the perforation openings lead into a cavity, which is provided in the back surface of the substrate, under the diaphragm.
A further exemplary refinement provides for the diaphragm to be made out of a single conductive layer.
According to a further exemplary refinement, the diaphragm is made out of an upper conductive layer and a lower, first dielectric layer.
A further exemplary refinement provides for the substrate to have a wafer substrate, a second dielectric layer situated on it, and a silicon-material layer on the second dielectric layer, perforation openings running through the second dielectric layer, and the second dielectric layer electrically insulating the wafer substrate and the substrate-material layer on it from each other outside of the perforation openings.
According to a further exemplary refinement, a third dielectric layer is provided on the front side of the substrate, between the substrate and the diaphragm, the third dielectric layer preferably taking the form of a very thin layer (<500 nm, especially <100 nm) and being intended to function as a diffusion barrier against thermal outdiffusion of sacrificial-layer material, in particular germanium.
A further exemplary refinement provides for the damping medium to be a gas.